TSMC’s Arizona Foundry Expands Production Capabilities
Image of TSMC Office – Credit: TSMC
Expansion in Chip Manufacturing
Recent developments at TSMC’s semiconductor fabrication plant in Arizona reveal that the site is set to produce a second Apple chip design. This marks a significant milestone for the facility, which commenced operations just a few months ago.
Production Milestones Achieved
The inauguration of production/” title=”Simplified EUV Scanner Developed by Japanese Scientists Promises Cheaper Chip Production”>chip production at TSMC’s Arizona site took place in September 2023 after several years of construction initiated in 2020. As it ramps up operations, reports indicate that its capabilities are broadening.
New Developments for Apple Products
Sources close to industry insider Tim Culpan note that this facility has begun manufacturing Systems on Package (SiPs) specifically for the Apple Watch, representing Apple’s second product being developed at this location. Although details remain sparse regarding which SiP is currently under production, it is highly conjectured to be the S9 chipset used in the newly launched Apple Watch Series 9.
Integration with Existing Processes
The SiP fabrication utilizes an N4 four-nanometer process similar to that employed for producing the A16 chip. Given that the S9 derives from the A16 architecture, utilizing shared facilities seems logical and efficient.
Diverse Clientele Benefiting from Arizona Operations
Notably, Apple’s footprint isn’t alone in benefiting from TSMC’s Arizona foundry; AMD is also onboard with plans to manufacture its Ryzen 9000 series processors at this location—a product expected to debut commercially by early 2024.
Total Output Estimates and Future Growth Plans
The foundry does not disclose specific yields per wafer; however, current production stands at approximately 10,000 wafers monthly across three different chip types. This initial phase (Phase 1A) anticipates an increase to about 24,000 wafers monthly upon Phase 1B completion scheduled later on.
A typical twelve-inch wafer can yield hundreds of chips based on factors like die size and design intricacies. For instance, historical data from April 2023 showed an enhancement in output rates with expectations of around 620 chips per wafer when producing A17 and M3 processors utilizing advanced M3 technology nodes—confirming robust yield metrics as manufacturing scales up.
Pacing Forward Amid Challenges
The commencement timeline for Phase 1B aims for early Q1 of 2025; however, tooling delays may present challenges ahead but are not seen as detrimental overall progress.
This venture represents considerable importance for TSMC following an initial investment totaling $12 billion complemented by a substantial $6.6 billion subsidy through U.S. government initiatives aimed at bolstering domestic semiconductor manufacturing through funds such as CHIPS for America Fund.
An Economic Engine for Local Communities
The expansion plans encompass constructing three plants within Arizona’s tech landscape projected not only to boost local economies but also generate approximately 20,000 construction jobs alongside 6,000 stable manufacturing positions, fortifying both community growth and high-tech employment opportunities long-term.